Cypress CY7C344-25JC Simple EPLD, Programmable Array Logic, 28 Pin,10 pieces

Description

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CY7C344-25JC
Features :
• High-performance, high-density replacement for TTL,
74HC, and custom logic
• 32 macrocells, 64 expander product terms in one LAB
• 8 dedicated inputs, 16 I/O pins
• 0.8-micron double-metal CMOS EPROM technology
• 28-pin, 300-mil DIP, cerDIP or 28-pin HLCC, PLCC
package
Functional Description :
Available in a 28-pin, 300-mil DIP or windowed J-leaded
ceramic chip carrier (HLCC), the CY7C344 represents the
densest EPLD of this size. Eight dedicated inputs and 16
bidirectional I/O pins communicate to one logic array block. In
the CY7C344 LAB there are 32 macrocells and 64 expander
product terms. When an I/O macrocell is used as an input, two
expanders are used to create an input path. Even if all of the
I/O pins are driven by macrocell registers, there are still 16
“buried” registers available. All inputs,
macrocells
, and I/O pins
are interconnected within the LAB.
The speed and density of the CY7C344
makes
it a natural for
all types of applications. With just this one device, the designer
can implement complex state machines, registered logic, and
combinatorial “glue” logic, without using multiple chips. This
architectural flexibility allows the CY7C344 to replace
multichip TTL solutions, whether they are synchronous,
asynchronous, combinatorial, or all three.
Shipping Information Title
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